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Module timing

Module timing 

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The bus timings in microseconds, from the DS18B20 datasheet’s slot definitions.

Constants§

PRESENCE_SAMPLE_US
How long after releasing the reset pulse the presence pulse is sampled. A device pulls the line low 15 to 60 us after the release and holds it 60 to 240 us, so 70 us falls inside the presence pulse of every device.
PRESENCE_TAIL_US
The rest of the 480 us receive window after the presence sample.
READ_LOW_US
Read: the controller starts the slot with a short low pulse of at least 1 us.
READ_SAMPLE_US
Read: the line is sampled this long after release, inside the 15 us window from the start of the slot in which the device’s bit is valid.
READ_TAIL_US
Read: the rest of the 60 us slot plus recovery.
RESET_LOW_US
The reset pulse: the controller holds the line low at least 480 us.
WRITE_ONE_HIGH_US
Write 1: the line stays released for the rest of the slot plus recovery.
WRITE_ONE_LOW_US
Write 1: the line is pulled low briefly, within the 1 to 15 us the slot allows.
WRITE_ZERO_HIGH_US
Write 0: the recovery time before the next slot.
WRITE_ZERO_LOW_US
Write 0: the line is held low for the whole 60 to 120 us slot.